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M27V800 8 mbit (1mb x8 or 512kb x16) low voltage uv eprom and otp eprom september 1998 1/16 low voltage read operation: 3v to 3.6v fast access time: 100ns byte-wide or word-wide configurable 8 mbit mask rom replacement low power consumption active current 30ma at 8mhz standby current 20 m a programming voltage: 12.5v 0.25v programming time: 100 m s/byte (typical) electronic signature manufacturer code: 0020h device code: 00b2h description the M27V800 is a low voltage 8 mbit eprom offeredin the two ranges uv (ultra violet erase) and otp (one time programmable). it is ideally suited for microprocessor systems requiring large data or program storage. it is organised as either 1 mbit words of 8 bit or 512 kbit words of 16 bit. the pin-out is compatible with a 8 mbit mask rom. ai01851 19 a0-a18 bytev pp q0-q14 v cc M27V800 g e v ss 15 q15a1 figure 1. logic diagram a0-a18 address inputs q0-q7 data outputs q8-q14 data outputs q15a1 data output / address input e chip enable g output enable bytev pp byte mode / program supply v cc supply voltage v ss ground table 1. signal names 1 42 fdip42w (f) 44 1 so44 (m) plcc44 (k) 1 42 pdip42 (b)
g q0 q8 a3 a0 e v ss a2 a1 a13 v ss a14 a15 q7 a12 a16 bytev pp q15a-1 q5 q2 q3 v cc q11 q4 q14 a9 a8 a17 a4 a18 nc a7 ai01852 M27V800 8 1 2 3 4 5 6 7 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 20 19 18 17 q1 q9 a6 a5 q6 q13 42 39 38 37 36 35 34 33 a11 a10 q10 21 q12 40 41 figure 2a. dip pin connections symbol parameter value unit t a ambient operating temperature (3) 40 to 125 c t bias temperature under bias 50 to 125 c t stg storage temperature 65 to 150 c v io (2) input or output voltages (except a9) 2 to 7 v v cc supply voltage 2 to 7 v v a9 (2) a9 voltage 2 to 13.5 v v pp program supply voltage 2 to 14 v notes: 1. except for the rating ooperating temperature rangeo, stresses above those listed in the table oabsolute maximum ratingso may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not i mplied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. 2. minimum dc voltage on input or output is 0.5v with possible undershoot to 2.0v for a period less than 20ns. maximum dc voltage on output is v cc +0.5v with possible overshoot to v cc +2v for a period less than 20ns. 3. depends on range. table 2. absolute maximum ratings (1) g q0 q8 a3 a0 e v ss a2 a1 a13 v ss a14 a15 q7 a12 a16 bytev pp q15a-1 q5 q2 q3 v cc q11 q4 q14 a9 nc a18 a4 nc nc a7 ai01853 M27V800 8 2 3 4 5 6 7 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 20 19 18 17 q1 q9 a6 a5 q6 q13 44 39 38 37 36 35 34 33 a11 a10 q10 21 q12 40 43 1 42 41 a17 a8 figure 2b. so pin connections warning: nc = not connected. warning: nc = not connected. 2/16 M27V800
mode e g bytev pp a9 q0 - q7 q8 - q14 q15a1 read word-wide v il v il v ih x data out data out data out read byte-wide upper v il v il v il x data out hi-z v ih read byte-wide lower v il v il v il x data out hi-z v il output disable v il v ih x x hi-z hi-z hi-z program v il pulse v ih v pp x data in data in data in verify v ih v il v pp x data out data out data out program inhibit v ih v ih v pp x hi-z hi-z hi-z standby v ih x x x hi-z hi-z hi-z electronic signature v il v il v ih v id codes codes code note :x =v ih or v il ,v id = 12v 0.5v. table 3. operating modes identifier a0 q7 q6 q5 q4 q3 q2 q1 q0 hex data manufacturer's code v il 0010000020h device code v ih 10110010b2h note : outputs q8-q15 are set to '0'. table 4. electronic signature the M27V800 operates in the read mode with a supply voltage as low as 3v. the decrease in operating power allows either a reduction of the size of the battery or an increase in the time be- tween battery recharges. the fdip42w (window ceramic frit-seal package) has a transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. a new pattern can then be written rapidly to the device by following the programming proce- dure. for applications where the content is programmed only one time and erasure is not required, the M27V800 is offered in pdip42, so44 and plcc44 package. device operation the operating modes of the M27V800 are listed in the operating modes table. a single power supply is required in the read mode. all inputs are ttl compatible except for v pp and 12v on a9 for the electronic signature. read mode the M27V800 has two organisations, word-wide and byte-wide. the organisationis selected by the signal level on the bytev pp pin. when bytev pp isat v ih the word-wide organisationis selected and the q15a1 pin is used for q15 data output.when the bytev pp pin is at v il the byte-wide organisa- tion is selected and the q15a1 pin is used for the address input a1. when the memory is logically regarded as 16 bit wide, but read in the byte-wide organisation, then with a1 at v il the lower 8 bits of the 16 bit data are selected and with a1 at v ih the upper 8 bits of the 16 bit data are selected. the M27V800 has two control functions, both of which must be logically active in order to obtain data at the outputs. in addition the word-wide or byte-wide organisation must be selected. chip enable (e ) is the power control and should be used for device selection. output enable (g ) is the output control and should be used to gate data to the output pins independent of device selection. assuming that the addresses are stable, the ad- dress access time (t avqv ) is equal to the delay from e to output (t elqv ). data is available at the output after a delay of t glqv from the falling edge of g, assuming that e has been low and the addresses have been stable for at least t avqv -t glqv . description (cont'd) 3/16 M27V800
ai01822 3v high speed 0v 1.5v 2.4v standard 0.4v 2.0v 0.8v figure 3. ac testing input output waveform ai01823b 1.3v out c l c l = 30pf for high speed c l = 100pf for standard c l includes jig capacitance 3.3k w 1n914 device under test figure 4. ac testing load circuit high speed standard input rise and fall times 10ns 20ns input pulse voltages 0 to 3v 0.45v to 2.4v input and output timing ref. voltages 1.5v 0.8v and 2v table 5. ac measurement conditions symbol parameter test condition min max unit c in input capacitance (except bytev pp )v in =0v 10 pf input capacitance (bytev pp )v in = 0v 120 pf c out output capacitance v out =0v 12 pf note: 1. sampled only, not 100% tested. table 6. capacitance (1) (t a =25 c, f = 1 mhz ) standby mode the M27V800 has a standby mode which reduces the supply current from 20ma to 20 m a with low voltage operation v cc 3.6v, see read mode dc characteristics table for details. the M27V800 is placed in the standby mode by applying a cmos high signal to the e input. when in the standby mode, the outputs are in a high impedance state, independent of the g input. two line output control becauseeproms are usually used in larger mem- ory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. the two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. 4/16 M27V800
symbol parameter test condition min max unit i li input leakage current 0v v in v cc 1 m a i lo output leakage current 0v v out v cc 10 m a i cc supply current e=v il ,g=v il ,i out = 0ma, f = 8mhz, v cc 3.6v 30 ma e=v il ,g=v il ,i out = 0ma, f = 5mhz, v cc 3.6v 20 ma i cc1 supply current (standby) ttl e=v ih 1ma i cc2 supply current (standby) cmos e>v cc 0.2v, v cc 3.6v 20 m a i pp program current v pp =v cc 10 m a v il input low voltage 0.3 0.8 v v ih (2) input high voltage 2 v cc +1 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage ttl i oh = 400 m a 2.4 v notes: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. maximum dc voltage on output is v cc +0.5v. table 7. read mode dc characteristics (1) (t a = 0 to 70 c; v cc = 3.3v 10%; v pp =v cc ) for the most efficient use of thesetwo control lines, e should be decoded and used as the primary device selecting function, while g should be made a common connection to all devices in the array and connected to the read line from the system control bus. this ensures that all deselected mem- ory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. system considerations the power switching characteristics of advanced cmos epromsrequire carefull decoupliingof the supplies to the devices. the supply current i cc has three segments of importance to the system de- signer: the standby current, the active current and the transient peaks that are producedby the falling and rising edges of e. the magnitude of the transient current peaks is dependanton the capacititiveand inductive loading of the device outputs. the associated transient voltage peaks can be supressed by complying with the two line output control and by properly selected decoupling capacitors. it is recommended that a 0.1 m f ceramic capacitor is used on every device between v cc and v ss . this should be a high fre- quency type of low inherent inductanceand should be placed as close as possible to the device. in addition, a 4.7 m f electrolytic capacitor should be used between v cc and v ss for every eight devices. this capacitor should be mounted near the power supply connection point. the purpose of this ca- pacitor is to overcome the voltage drop caused by the inductive effects of pcb traces. 5/16 M27V800
note: bytev pp =v ih . ai01596b taxqx tehqz a0-a18 e g q0-q15 tavqv tghqz tglqv telqv valid hi-z valid figure 5. word-wide read mode ac waveforms symbol alt parameter test condition M27V800 unit -100 -120 -150 min max min max min max t avqv t acc address valid to output valid e=v il ,g=v il 100 120 150 ns t bhqv t st byte high to output valid e=v il ,g=v il 100 120 150 ns t elqv t ce chip enable low to output valid g=v il 100 120 150 ns t glqv t oe output enable low to output valid e=v il 50 60 70 ns t blqz (2) t std byte low to output hi-z e=v il ,g=v il 45 50 60 ns t ehqz (2) t df chip enable high to output hi-z g=v il 045050060ns t ghqz (2) t df output enable high to output hi-z e=v il 045050060ns t axqx t oh address transition to output transition e=v il ,g=v il 555ns t blqx t oh byte low to output transition e=v il ,g=v il 555ns notes: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp. 2. sampled only, not 100% tested. table 8. read mode ac characteristics (1) (t a = 0 to 70 c; v cc = 3.3v 10%; v pp =v cc ) 6/16 M27V800
ai01598c taxqx tbhqv a0-a18 bytev pp tavqv tblqx tblqz valid hi-z a1 data out data out valid q0-q7 q8-q15 figure 7. byte transition ac waveforms note: chip enable (e) and output enable (g) = v il . ai01597b taxqx tehqz a1,a0-a18 e g q0-q7 tavqv tghqz tglqv telqv valid hi-z valid figure 6. byte-wide read mode ac waveforms note: bytev pp =v il . 7/16 M27V800
symbol parameter test condition min max unit i li input leakage current 0 v in v cc 1 m a i cc supply current 50 ma i pp program current e = v il 50 ma v il input low voltage 0.3 0.8 v v ih input high voltage 2.4 v cc + 0.5 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage ttl i oh = 2.5ma 3.5 v v id a9 voltage 11.5 12.5 v note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . table 9. programming mode dc characteristics (1) (t a =25 c; v cc = 6.25v 0.25v; v pp = 12.5v 0.25v) symbol alt parameter test condition min max unit t avel t as address valid to chip enable low 2 m s t qvel t ds input valid to chip enable low 2 m s t vphav t vps v pp high to address valid 2 m s t vchav t vcs v cc high to address valid 2 m s t eleh t pw chip enable program pulse width 45 55 m s t ehqx t dh chip enable high to input transition 2 m s t qxgl t oes input transition to output enable low 2 m s t glqv t oe output enable low to output valid 120 ns t ghqz (2) t dfp output enable high to output hi-z 0 130 ns t ghax t ah output enable high to address transition 0 ns notes: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. sampled only, not 100% tested. table 10. programming mode ac characteristics (1) (t a =25 c; v cc = 6.25v 0.25v; v pp = 12.5v 0.25v) programming the M27V800 has been designed to be fully com- patible with the m27c800 and has the same elec- tronic signature. as a result the M27V800 can be programmed as the m27c800 on the same pro- gramming equipmentsapplying 12.75v on v pp and 6.25v on v cc by the use of the same presto iii algorithm. when delivered (and after each erasure for uv eprom), all bits of the M27V800 are in the '1' state. data is introduced by selectively program- ming '0's into the desired bit locations. although only '0's will be programmed, both '1's and '0's can be present in the data word. the only way to change a '0' to a '1' is by die expositionto ultraviolet light (uv eprom). the M27V800 is in the pro- gramming mode when v pp input is at 12.5v, g is at v ih and e is pulsed to v il . the data to be pro- grammed is applied to 16 bits in parallel to the data outputpins. the levels required for the addressand data inputs are ttl. v cc is specified to be 6.25v 0.25v. 8/16 M27V800
tavel valid ai01599 a0-a18 q0-q15 bytev pp v cc g data in data out e tqvel tvphav tvchav tehqx teleh tglqv tqxgl tghqz tghax program verify figure 8. programming and verify modes ac waveforms presto iii programming algorithm thepresto iii programmingalgorithmallows the whole array to be programed with a guaranteed margin in a typical time of 26 seconds. program- ming with presto iii consists of applying a se- quence of 50 m s program pulses to each word until a correct verify occurs (see figure 9). during pro- graming and verify operation a margin mode circuit is automatically activated to guarantee that each cell is programed with enough margin. no overprogram pulse is applied since the verify in margin mode at v cc much higher than 3.6v provides the neccessary margin to each pro- grammed cell. program inhibit programming of multiple M27V800s in parallel with different data is also easily accomplished. except for e, all like inputs including g of the parallel M27V800 may be common. a ttl low level pulse applied to a M27V800's e input and v pp at 12.5v, will program that M27V800. a high level e input inhibits the other M27V800s from being pro- grammed. program verify a verify (read) should be performed on the pro- grammed bits to determine that they were correctly programmed. the verify is accomplished with e at v ih and g at v il ,v pp at 12.5v and v cc at 6.25v. ai00901 n=0 last addr verify e=50 m s pulse ++n =25 ++ addr v cc = 6.25v, v pp = 12.5v fail check all words bytev pp =v ih 1st: v cc =6v 2nd: v cc = 3.3v yes no yes no yes no figure 9. programming flowchart 9/16 M27V800
on-board programming the M27V800 can be directly programmed in the application circuit. see the relevant application note an620. electronic signature the electronic signature (es) mode allows the reading out of a binary code from an eprom that will identify its manufacturer and type. this mode is intended for use by programming equipment to automatically match the device to be programmed with its correspondingprogramming algorithm. the es mode is functional in the 25 c 5 c ambient temperature range that is required when program- ming the M27V800. to activate the es mode, the programming equipmentmust force 11.5vto 12.5v on address line a9 of the M27V800, with v pp =v cc =5v. two identifier bytes may then be sequenced from the device outputs by toggling address line a0 from v il to v ih . all other address lines must be held at v il during electronic signa- ture mode. byte 0 (a0=v il ) represents the manufacturer code and byte 1 (a0=v ih ) the device identifier code. for the stmicroelectronics M27V800, these two iden- tifier bytes are given in table 4 and can be read-out on outputs q0 to q7. note that the M27V800 and m27c800 have the same identifier bytes. erasure operation (applies to uv eprom) theerasure characteristics of the M27V800is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 ?. it should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 ? range. research shows that con- stant exposure to room level fluorescent lighting could erase a typical M27V800 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. if the M27V800is to be exposed to thesetypes of lighting conditions for extended periods of time, it is sug- gested that opaque labels be put over the M27V800window to preventunintentionalerasure. the recommended erasure procedure for M27V800 is exposureto short wave ultraviolet light which has a wavelength of 2537 ?. the integrated dose (i.e. uv intensity x exposuretime) for erasure should be a minimum of 30 w-sec/cm 2 . the era- sure time with this dosage is approximately 30 to 410 minutes using an ultraviolet lamp with 12000 m w/cm 2 power rating. the M27V800 should be placed within 2.5cm (1 inch) of the lamp tubes during the erasure. some lamps have a filter on their tubes which should be removed before era- sure. 10/16 M27V800
ordering information scheme for a list of availableoptions (speed,package, etc...) or for further information on any aspect of this device, please contact the stmicroelectronics sales office nearest to you. speed -100 100 ns -120 120 ns -150 150 ns vcc tolerance blank 10% x 5% package f fdip42w b pdip42 k plcc44 m so44 temperature range 1 0 to 70 c options tr tape & reel packing example: M27V800 -100 x m 1 tr 11/16 M27V800
fdipw-b a3 a1 a l b1 b e1 d s e1 e n 1 c ea d2 k k1 a eb a2 symb mm inches typ min max typ min max a 5.72 0.225 a1 0.51 1.40 0.020 0.055 a2 3.91 4.57 0.154 0.180 a3 3.89 4.50 0.153 0.177 b 0.41 0.56 0.016 0.022 b1 1.45 0.057 c 0.23 0.30 0.009 0.012 d 54.41 54.86 2.142 2.160 d2 50.80 2.000 e 15.24 0.600 e1 14.50 14.90 0.571 0.587 e 2.54 0.100 ea 14.99 0.590 eb 16.18 18.03 0.637 0.710 l 3.18 0.125 s 1.52 2.49 0.060 0.098 k 9.40 0.370 k1 11.43 0.450 a 4 11 4 11 n42 42 drawing is not to scale. fdip42w - 42 pin ceramic frit-seal dip, with window 12/16 M27V800
pdip a2 a1 a l b1 b e1 d s e1 e n 1 c a ea eb d2 symb mm inches typ min max typ min max a 5.08 0.200 a1 0.25 0.010 a2 3.56 4.06 0.140 0.160 b 0.38 0.53 0.015 0.021 b1 1.27 1.65 0.050 0.065 c 0.20 0.36 0.008 0.014 d 52.20 52.71 2.055 2.075 d2 50.80 2.000 e 15.24 0.600 e1 13.59 13.84 0.535 0.545 e1 2.54 0.100 ea 14.99 0.590 eb 15.24 17.78 0.600 0.700 l 3.18 3.43 0.125 0.135 s 0.86 1.37 0.034 0.054 a 0 10 0 10 n42 42 drawing is not to scale. pdip42 - 42 pin plastic dip, 600 mils width 13/16 M27V800
plcc44 - 44 lead plastic leaded chip carrier, square plcc d ne e1 e 1n d1 nd cp b d2/e2 e b1 a1 a r 0.51 (.020) 1.14 (.045) f a2 symb mm inches typ min max typ min max a 4.20 4.70 0.165 0.185 a1 2.29 3.04 0.090 0.120 a2 0.51 0.020 b 0.33 0.53 0.013 0.021 b1 0.66 0.81 0.026 0.032 d 17.40 17.65 0.685 0.695 d1 16.51 16.66 0.650 0.656 d2 14.99 16.00 0.590 0.630 e 17.40 17.65 0.685 0.695 e1 16.51 16.66 0.650 0.656 e2 14.99 16.00 0.590 0.630 e 1.27 0.050 f 0.00 0.25 0.000 0.010 r 0.89 0.035 n44 44 cp 0.10 0.004 drawing is not to scale. 14/16 M27V800
so-b e n cp b e a2 d c l a1 a h a 1 symb mm inches typ min max typ min max a 2.42 2.62 0.095 0.103 a1 0.22 0.23 0.009 0.010 a2 2.25 2.35 0.089 0.093 b 0.50 0.020 c 0.10 0.25 0.004 0.010 d 28.10 28.30 1.106 1.114 e 13.20 13.40 0.520 0.528 e 1.27 0.050 h 15.90 16.10 0.626 0.634 l 0.80 0.031 a 3 3 n44 44 cp 0.10 0.004 drawing is not to scale. so44 - 44 lead plastic small outline, 525 mils body width 15/16 M27V800
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. spec ifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics. ? 1998 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. http://www.st.com 16/16 M27V800

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